STM32H573II产品规格_产品特征_现货出售
概述
STM32H573xx器件是基于高性能Arm的高性能微控制器家族(STM32H5系列)
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皮质
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-M33 32位RISC内核。
大脑皮层
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-M33内核具有单精度浮点单元(FPU)，支持所有Arm
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单精度数据处理指令和所有数据类型。
大脑皮层
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-M33内核还实现了一整套DSP(数字信号处理)指令和内存保护单元(MPU)，增强了应用程序的安全性。
这些器件嵌入高速存储器(2mb双银行闪存和640 kb SRAM)，灵活的外部存储器控制器(FMC)(用于封装100引脚及以上的器件)，一个Octo-SPI存储器接口(所有封装上至少有一个Quad-SPI)和广泛的增强型I/ o和外设连接到三个APB总线，三个AHB总线和32位多AHB总线矩阵。
设备提供符合Arm TBSA (trusted-based security architecture)要求的安全基础
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该器件具有嵌入式闪存和SRAM的几种保护机制:读出保护，写保护，安全和隐藏保护区域。
这些设备嵌入了几个增强安全性的外设:一个快速AES协处理器、一个具有抗DPA能力的安全AES协处理器和一个可以由具有快速AES的硬件共享的硬件唯一密钥、一个公钥加速器(PKA)、抗DPA能力、一个用于Octo-SPI外部存储器的动态解密引擎、一个HASH硬件加速器和一个真正的随机数生成器
该设备提供主动篡改检测和保护，防止瞬态和环境扰动攻击，这要归功于几个内部监控，在攻击发生时生成秘密数据擦除。
该器件提供两个快速12位ADC，两个DAC通道，一个内部电压参考缓冲器，一个低功耗RTC，两个32位通用定时器，两个16位PWM定时器专用于电机控制，八个16位通用定时器，两个16位基本定时器和六个16位低功耗定时器。
这些设备还具有标准和先进的通信接口，如
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c、1个I3C、6个spi、3个i2s、6个usart、6个UART和1个低功耗UART、2个sai、1个数码相机接口(DCMI)、最多2个SDMMC、2个FDCAN、1个USB全速、1个USB Type-C™/USB Power Delivery控制器。
器件工作温度范围为- 40 ~ + 85℃(+ 130℃结)和- 40 ~ + 125℃(+ 130℃结)，电源电压范围为1.71 ~ 3.6 V。
一套全面的节能模式允许低功耗应用的设计。
支持一些独立电源，如ADC、dac的模拟独立电源输入，USB的3.3 V专用电源输入和一些gpio和SDMMC的专用电源输入。
这些设备提供从64针到176针的8种封装。
所有的封装都有两个选项LDO或SMPS供应的V
核心
(除了在SMPS中不可用的LQFP64和VFQFPN68包和在LDO中不可用的WLCSP80包)。
STM32H573II符号图
STM32H573II功能参数
- 内核
- Arm® Cortex®-M33 CPU with TrustZone®, FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1)
- ART Accelerator
- 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories
- 4-Kbyte data cache for external memories
- Benchmarks
- 1.5 DMIPS/MHz (Drystone 2.1)
- 1023 CoreMark® (4.092 CoreMark®/MHz)
- Memories
- Up to 2 Mbytes of embedded flash memory with ECC, 2 banks read-while-write
- Up to 48-Kbyte per bank with high-cycling capability (100 K cycles) for DATA flash
- 1-Kbyte OTP (one-time programmable)
- 640 Kbytes of SRAM (64-Kbyte SRAM2 with ECC and 320-Kbyte SRAM3 with flexible ECC)
- 4 Kbytes of backup SRAM available in the lowest power modes
- Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- One Octo-SPI memory interface with on-the-fly decryption and support for serial PSRAM/NAND/NOR, Hyper RAM/flash frame formats
- Two SD/SDIO/MMC interfaces
- Clock management
- Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
- General-purpose inputs/outputs
- Up to 139 fast I/Os with interrupt capability (most 5 V tolerant)
- Up to 10 I/Os with independent supply down to 1.08 V
- Low-power consumption
- Sleep, Stop and Standby modes
- VBAT supply for RTC, 32x 32-bit backup registers
- 安保
- Arm® TrustZone® with Armv8-M mainline security extension
- Up to eight configurable SAU regions
- TrustZone® aware and securable peripherals
- Flexible life-cycle scheme with secure debug authentication
- Preconfigured immutable root of trust (ST-iROT)
- SFI (secure firmware installation)
- Secure data storage with hardware unique key (HUK)
- Secure firmware upgrade support with TF-M
- Two AES coprocessors including one with DPA resistance
- Public key accelerator, DPA resistant
- On-the-fly decryption of Octo-SPI external memories
- HASH hardware accelerator
- True random number generator, NIST SP800-90B compliant
- 96-bit unique ID
- Active tampers
- 2x DMA controllers to offload the CPU
- Two dual-port DMAs with FIFO
- Mathematical acceleration
- CORDIC for trigonometric functions acceleration
- FMAC (filter mathematical accelerator)
- Reset and supply management
- 1.71 V to 3.6 V application supply and I/O
- POR, PDR, PVD and BOR
- Embedded regulator (LDO) or SMPS step-down converter regulator with configurable scalable output to supply the digital circuitry
- Up to 24 timers
- 18x 16-bit (including x6 low-power 16-bit timer available is Stop mode)
- Two 32-bit timers with up to four IC/OC/PWM or pulse counter and quadrature (incremental) encoder input
- Two watchdogs
- Two SysTick timer
- Up to 34x communication interfaces
- Up to four I2C FM+ interfaces (SMBus/PMBus)
- One I3C interface
- Up to 12 U(S)ARTS (ISO7816 interface, LIN, IrDA, modem control) and 1x LP UART
- Up to six SPIs including three muxed with full-duplex I2S for audio class accuracy via internal audio PLL or external clock and up to five additional SPI from five USART when configured in Synchronous mode (one additional SPI with OctoSPI)
- Two SAI
- Two FD-CAN
- One 8- to 14- bit camera interface
- One 16-bit parallel slave synchronous-interface
- One HDMI-CEC
- One Ethernel MAC interface with DMA controller
- One USB 2.0 full-speed host and device
- One USB Type-C®/ USB power-delivery r3.1
- Analog
- Two 12-bit ADC with up to 5 MSPS in 12-bit
- Two 12-bit D/A converters
- Digital temperature sensor
- Debug
- Authenticated debug and flexible device life cycle
- Serial wire-debug (SWD), JTAG, Embedded Trace Microcell™ (ETM)
- ECOPACK2 compliant packages
STM32H573II引脚图
STM32H573II 3D图
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