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STM32H563AI中文规格_功能特性_现货专卖

作者： IC先生来源：网络浏览量：106 时间：2023-12-21 08:04:36

概述

STM32H562xx和STM32H563xx器件是基于高性能Arm的STM32H5系列的高性能微控制器

皮质

-M33 32位RISC内核。

大脑皮层

-M33内核的特点是单精度浮点单元(FPU)，它支持所有Arm

单精度数据处理指令和所有数据类型。

大脑皮层

-M33内核实现了一整套DSP(数字信号处理)指令和内存保护单元(MPU)，增强了应用程序的安全性。

这些器件嵌入高速存储器(高达2 mb的双银行闪存和640 kb的SRAM)，一个灵活的外部存储器控制器(FMC)，用于封装100引脚以上的器件，一个OCTOSPI存储器接口(所有封装上至少有一个Quad-SPI)，以及广泛的增强型I/ o和连接到三个APB总线，三个AHB总线和32位多AHB总线矩阵的外设。

设备提供符合Arm TBSA (trusted-based security architecture)要求的安全基础

．

该器件具有嵌入式闪存和SRAM的几种保护机制:读出保护，写保护，安全和隐藏保护区域。

专用外设增强了安全性:一个HASH硬件加速器和一个真正的随机数生成器。

该设备提供主动篡改检测和保护，防止瞬态和环境扰动攻击，由于几个内部监控，在攻击的情况下产生秘密数据擦除。

该器件提供两个快速12位adc，两个DAC通道，一个内部电压参考缓冲器，一个低功耗RTC，两个32位通用定时器，两个16位PWM定时器专用于电机控制，八个16位通用定时器，两个16位基本定时器和六个16位低功耗定时器。

这些设备还具有标准和先进的通信接口，即:四个I

c、1个I3C、6个spi、3个i2s、6个usart、6个UART和1个低功耗UART、2个sai、1个数码相机接口(DCMI)、最多2个sdmmc、最多2个fdcan、1个USB全速、1个USB Type-C

/USB供电控制器，一个以太网接口(仅适用于STM32H563xx)。

器件工作温度范围为-40 ~ +85℃(+130℃结)和-40 ~ +125℃(+130℃结)，电源电压范围为1.71 ~ 3.6 V。

一套全面的节能模式允许低功耗应用的设计。

支持独立电源:ADC、dac的模拟独立电源输入，USB 3.3 V专用电源输入，部分gpio和SDMMC的专用电源输入。

这些设备提供8种封装，从64到176个引脚。

所有封装都提供LDO或SMPS V电源选项

核心

(LQFP64和VFQFPN68包除外，SMPS不支持，WLCSP80不支持LDO)。

STM32H563AI符号图

STM32H563AI

STM32H563AI功能参数

内核
- Arm^® Cortex^®-M33 CPU with TrustZone^®, FPU, frequency up to 250 MHz, MPU, 375 DMIPS (Dhrystone 2.1)
ART Accelerator
- 8-Kbyte instruction cache allowing 0-wait-state execution from flash and external memories
- 4-Kbyte data cache for external memories
Benchmarks
- 1.5 DMIPS/MHz (Drystone 2.1)
- 1023 CoreMark^® (4.092 CoreMark^®/MHz)
Memories
- Up to 2 Mbytes of embedded flash memory with ECC, two banks read-while-write
- Up to 48-Kbyte per bank with high-cycling capability (100 K cycles) for data flash
- 2-Kbyte OTP (one-time programmable)
- 640 Kbytes of SRAM (64-Kbyte SRAM2 with ECC and 320-Kbyte SRAM3 with flexible ECC)
- 4 Kbytes of backup SRAM available in the lowest power modes
- Flexible external memory controller with up to 16-bit data bus: SRAM, PSRAM, FRAM, SDRAM/LPSDR SDRAM, NOR/NAND memories
- One Octo-SPI memory interface with support for serial PSRAM/NAND/NOR, hyper RAM/flash frame formats
- Two SD/SDIO/MMC interfaces
Clock management
- Internal oscillators: 64 MHz HSI, 48 MHz HSI48, 4 MHz CSI, 32 kHz LSI
- External oscillators: 4-50 MHz HSE, 32.768 kHz LSE
General-purpose inputs/outputs
- Up to 140 fast I/Os with interrupt capability (most 5 V tolerant)
- Up to ten I/Os with independent supply down to 1.08 V
Low-power consumption
- Sleep, Stop, and Standby modes
- V_BAT supply for RTC, 32 backup registers(32-bit)
安保
- Arm^® TrustZone^® with Armv8-M mainline security extension
- Up to eight configurable SAU regions
- TrustZone^® aware and securable peripherals
- Flexible life cycle scheme with secure debug authentication
- SFI (secure firmware installation)
- Secure firmware upgrade support withTF-M
- HASH hardware accelerator
- ECDSA signature verification
- True random number generator, NIST SP800-90B compliant
- 96-bit unique ID
- Active tampers

Two DMA controllers to offload the CPU
- Two dual-port DMAs with FIFO
Mathematical acceleration
- CORDIC for trigonometric functions acceleration
- FMAC (filter mathematical accelerator)
Reset and supply management
- 1.71 V to 3.6 V application supply and I/O
- POR, PDR, PVD, and BOR
- Embedded regulator (LDO) or SMPS step-down converter regulator with configurable scalable output to supply the digital circuitry
Up to 24 timers
- 18x 16-bit (including six low-power 16-bit timers available is Stop mode)
- Two 32-bit timers with up to four IC/OC/PWM or pulse counters and quadrature (incremental) encoder input
- Two watchdogs
- Two SysTick timers
Up to 34 communication interfaces
- Up to four I2Cs Fm+ (SMBus/PMBus^®)
- One I3C
- Up to 12 U(S)ARTs (ISO7816 interface, LIN, IrDA, modem control) and one LPUART
- Up to six SPIs including three muxed full-duplex I2S audio class accuracy via internal audio PLL or external clock, and up to five additional SPIs from five USARTs when configured in Synchronous mode (one additional SPI with OctoSPI)
- Two SAIs
- Two FDCANs
- One 8- to 14-bit camera interface
- One 16-bit parallel slave synchronous-interface
- One HDMI-CEC
- One Ethernet MAC interface with DMA controller
- One USB 2.0 full-speed host and device
- One USB Type-C^®/ USB Power Delivery r3.1
Analog
- Two 12-bit ADCs with up to five MSPS in 12-bit
- Two 12-bit DACs
- Digital temperature sensor
Debug
- Authenticated debug and flexible device life cycle
- Serial wire-debug (SWD), JTAG, Embedded Trace Macrocell™ (ETM)
ECOPACK2 compliant packages